Opinions — Wednesday, September 2, 2026

The Federal Circuit affirmed the Patent Trial and Appeal Board's final written decision finding claims 1 and 3–5 of the Vieths' U.S. Patent No. 9,066,958 unpatentable as obvious. The '958 patent claimed a method of delivering vitamin D to a human being by applying one drop of a vitamin D composition in medium-chain triglycerides to an object's exterior surface where the drop adheres, then having the person suck or lick the composition from the object. The central dispute involved whether prior art reference Harder, which taught administering vitamin D in MCT oil via a spoon, disclosed or suggested the claim limitation requiring that the drop "adhere" to the object surface without immediately dripping away or coating the surface so as to prevent efficient removal.

The court's analysis turned on application of forfeiture doctrine and the substantial evidence standard for Board fact-finding. The court held the Board did not abuse its discretion in finding the Vieths forfeited arguments raised for the first time in their sur-reply brief or at oral argument, including challenges to Harder's disclosure of MCT composition and whether Blass was non-analogous art. On the merits, the court found substantial evidence supported the Board's determination that Harder inherently disclosed or alternatively taught the "adheres" limitation, relying on expert testimony that a drop could be efficiently removed either by tilting the spoon or placing it in an infant's mouth for licking or sucking, and on the specification's teaching that only viscosity and triglyceride chain length impact adherence.

The Federal Circuit affirmed the Patent Trial and Appeal Board's determination that all claims of Netlist, Inc.'s U.S. Patent Nos. 8,787,060 and 9,318,160 are unpatentable as obvious. The patents concern three-dimensional stacked memory packages that reduce electrical load on control die drivers by connecting subgroups of array dies to separate die interconnects (such as through-silicon vias) rather than connecting all array dies to a single interconnect. The central dispute concerned whether a skilled artisan would have been motivated to combine the prior art references Kim (disclosing TSV interconnects in stacked memory) and Rajan (teaching shared data buses among multiple memory chips) to arrive at the claimed invention.

The court upheld the Board's motivation-to-combine finding based on substantial evidence that a skilled artisan would implement Rajan's shared bus approach using Kim's TSV interconnects to avoid adding space and circuitry, rejecting Netlist's arguments that Kim taught away from the combination or that data collision concerns rendered success unreasonable. The court also found no APA violation in the Board's explanations, reaffirming that the Board need not address every argument or provide perfect clarity if its reasoning can be discerned. On dependent claim 7, which requires selecting the number of array dies "in consideration of" load to reduce load differences, the court rejected Netlist's newly raised construction argument that the claim requires different-length TSVs as a starting point, holding that considering load differences applies even when the starting difference is zero.

The Federal Circuit affirmed the Patent Trial and Appeal Board's determination that all challenged claims of Netlist's U.S. Patent Nos. 11,016,918 and 11,232,054, covering memory modules with on-board voltage converters, would have been obvious over combinations of the prior art. Micron had petitioned for inter partes review asserting obviousness based on Harris (a patent publication), the JEDEC FBDIMM standards, and for certain dependent claims, Amidi and Hajeck. The Board found the challenged claims unpatentable, and Netlist appealed arguing the Board improperly departed from the petition's theories, lacked substantial evidence for key findings, and violated the Administrative Procedure Act.

The court applied abuse-of-discretion review to the Board's determination of what arguments were fairly presented in the petition, rejecting Netlist's contention that the Board impermissibly relied on a combination of Harris and the FBDIMM standards where the petition had identified that precise combination as "Ground 1" throughout. Under substantial evidence review, the court upheld the Board's findings that Harris in view of FBDIMM taught receiving power through edge connectors (given Harris's express identification of FBDIMMs as a preferred embodiment and undisputed evidence that FBDIMMs conventionally receive power this way), that implementing multiple buck converters would have been obvious based on expert testimony regarding practical benefits, and that Amidi's "power faults" disclosure would have been understood to encompass overvoltage conditions. The court also found no APA violation where the Board provided limited analysis of claim limitations that Netlist had not substantively disputed below.

The Federal Circuit affirmed the Patent Trial and Appeal Board's final written decision in an inter partes review that found all challenged claims of Netlist, Inc.'s U.S. Patent No. 10,949,339 unpatentable as obvious over the combination of the Ellsberry reference and the Halbert patent. The '339 patent relates to computer memory modules with buffers having data paths that are ordinarily disabled to electrically isolate DRAM devices from a memory controller, but are selectively enabled during read or write operations. Netlist challenged the Board's findings on two primary grounds: (1) that Ellsberry failed to teach data paths enabled "in accordance with a latency parameter" as required by claim limitation 1(e), and (2) that Ellsberry failed to teach "enabling" a "data path" within the buffer as required by limitations 1(e) and 1(f). The court held that substantial evidence supported the Board's determination that Ellsberry's switch ASICs used a Posted CAS_n latency parameter to control the timing of data path enablement, and that Ellsberry's Ports A and B, located within the switch ASIC, constituted the claimed enabled data paths.

The decision reinforces limitations on appellants' ability to challenge claim construction through selective graphical annotations of prior art figures. Netlist's primary argument regarding data path location rested on its own color-coded annotations to Ellsberry's Figure 2, which the Board rejected as "manifestly incorrect" because the figure plainly depicted Ports A and B as components inside the switch ASIC. The court's analysis also clarifies the boundaries of SAS Institute compliance in inter partes review proceedings. Although the Board referenced Netlist's own '537 patent to explain how a person of ordinary skill would implement Ellsberry to account for buffer propagation delay, the court found any potential error harmless because the Board alternatively found the same teaching in Ellsberry alone through expert testimony regarding Ellsberry's Figure 8B notation. This alternative-ground analysis preserves Board decisions where subsidiary evidence may have strayed from the petition but the ultimate finding rests on properly cited prior art.